V5.8.6.0 Release Notes
V5.8.5.0 Release notes
This bug (actually several bugs in the same library) was exposed by a very large, congested and complex circuit board designed by a cusotmer in 2016 (before the PCB123 slivers project). In 2016, the customer ordered Gerber files only for this project and PCB123 generated good files for it. The slivers removal project was released as 5.7.0 in August of 2018, and it failed to generate good Gerber files for this same project. An older pre-slivers project version 5.3.0 Gerber extractor was used to correctly generate Gerbers for the customer while I worked on fixing the bug in the current release.
The bugs were deep within infrequently used geometry library code and were very difficult to isolate. They were tripped by rare boundary conditions in the customer's circuit board data that few users would ever encounter. New library code with a better algorithm was written to perform the tasks the flawed old code was being called on to do. The new library code now creates good Gerber files for the problem project despite the customer's difficult data.
V5.8.1.0 Release Notes
This release of PCB123 fixes the issues from 5.8.0.2.
V5.8.0.2 Release Notes (Removed due to unannounced api changes)
Upgraded the SnapEDA api and implemented its new features:
New search UI
Updated login process
Highlighted sponsored parts in search results
The ability to request parts not found in the SnapEda library.
V5.7.12 Release Notes (Currently available)
V5.7.6 Release Notes:
V5.7.5 Release Notes:
V5.7.2 Release Notes:
V5.7.0 Release Notes:
This release of PCB123 contains code which will process areas of copper fill on circuit boards to ensure that clearances made within them for overlapping copper objects of different nets will not leave any copper having a width of less than or equal to five thousandths of an inch. Since the processing that performs this task is computationally intense, it is only performed on demand when design rule checks (DRC's) are run and viewed in the new read only "True Copper Pours View" tab. Since DRC's are automatically run before the circuit board order is placed with Sunstone.com, this view of the board is what will be generated to Gerber files and fabricated.
The regular layout view of the program is unchanged and presents the circuit board as always, but without the more detailed anti-sliver copper clearance processing that appears in the "True Copper Pours View". The layout view is a very close approximation of the "True Copper Pours View" when observing areas of copper fill (the only difference), but because it rigorously removes thin strips of copper within the copper fill areas, it can close some paths of electrical conductivity within the copper fills that appear in the layout view to be slightly open. Because of this, the DRC's for unconnected nets were programmed to detect and report all such losses in net connectivity so that they can be addressed by the user before the board is ordered.
This automatic copper sliver removal processing within PCB123 allows the user to perform the same work done by Sunstone CAM tooling engineers to prepare circuit board projects for fabrication in the factory. However, unlike when the processing is done by Sunstone engineers at the factory, with the integration of this processing into PCB123, the user can correct net connectivity issues before the order and present a board to Sunstone that is engineered without copper slivers. This allows experienced users to select an "Engineering Level" of Limited Review for their project, which enjoys a lower price than one similarly engineered at the factory.
V5.6.2 Release Notes:
V5.6.1 Release Notes:
V5.6.0 Release Notes:
V5.5.3 Release Notes:
V5.2.0 Release Notes:
V5.1.3 Release Notes:
V5.1.2 Release Notes:
V5.1.1 Release Notes:
V5.1 Release Notes:
v5.0.3 Release Notes:
V5.0.2 release notes:
V5.0.1 release notes:
V4.1.25 release notes
V4.1.20.0 release notes:
v4.1.19 Release Notes:
v4.1.16 Release Notes:
v4.1.15 Release Notes:
v4.1.14 Release Notes:
v4.1.13 Release Notes:
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